LMK04806BISQX/NOPB vs LMK04816BISQX/NOPB

Part Number
LMK04806BISQX/NOPB
LMK04816BISQX/NOPB
Category Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers
Manufacturer Texas Instruments Texas Instruments
Description IC CLOCK DUAL PLL 64WQFN IC CLOCK DUAL PLL 64WQFN
Package Tape & Reel (TR) Tape & Reel (TR)
Series PLLatinum™ PLLatinum™
Type Jitter Cleaner -
Voltage - Supply 3.15V ~ 3.45V 3.15V ~ 3.45V
Operating Temperature -40°C ~ 85°C -40°C ~ 85°C
Mounting Type Surface Mount Surface Mount
Package / Case 64-WFQFN Exposed Pad 64-WFQFN Exposed Pad
Supplier Device Package 64-WQFN (9x9) 64-WQFN (9x9)
Output LVCMOS, LVDS, LVPECL LVCMOS, LVDS, LVPECL
Frequency - Max 1.536GHz 2.6GHz
Number of Circuits 1 1
Input LVCMOS, LVDS, LVPECL LVCMOS, LVDS, LVPECL
PLL Yes Yes
Ratio - Input:Output 2:14 3:12
Differential - Input:Output Yes/Yes Yes/Yes
Divider/Multiplier Yes/No Yes/No
  • 1. What is a PLL frequency synthesizer?

    A PLL frequency synthesizer is a device that generates multiple output frequencies using phase-locked loop technology. Its core function is to generate different multiples of frequencies from a single reference frequency. This method is widely used in radio frequency (RF) communication systems, especially in generating local oscillator (LO) signals for up-conversion and down-conversion of RF signals.
    The working principle of a PLL frequency synthesizer is based on phase-locked loop technology, which includes key components such as phase/frequency detector (PFD), loop filter, and voltage-controlled oscillator (VCO).

  • 2. What is a PLL clock generator?

    A PLL clock generator (Phase-Locked Loop Clock Generator) is an electronic circuit used to generate and adjust a clock signal. It automatically adjusts the frequency of the internal oscillator by comparing the phase difference between the input signal and the output signal of the internal oscillator so that the phase of the output signal is synchronized with the input signal. PLL clock generator is mainly used to generate high-speed and stable clock signal to provide timing reference for communication system.
    The key components of PLL clock generator include:
    Phase detector: compare the phase difference between input signal and feedback signal.
    Charge pump: adjust the voltage to control the frequency of VCO according to the output of phase detector.
    Loop filter: smooth the output of charge pump and reduce noise.
    Voltage controlled oscillator (VCO): change the oscillation frequency according to the control voltage to generate output clock signal.

  • 3. How does Phase-locked loops(PLL) work?

    PLL (phase locked loop) is a feedback control circuit that continuously adjusts the frequency and phase of the internal oscillation signal to synchronize with the input reference signal by comparing the phase difference between the input signal and the feedback signal. PLL is mainly composed of phase detector (PD), loop filter (LF), voltage controlled oscillator (VCO) and optional divider (Divider).
    When PLL starts working, the frequency of input reference signal is always different from the inherent oscillation frequency of voltage controlled oscillator, resulting in constant phase difference. The error voltage output by the phase detector is converted into a control voltage through a loop filter and added to the voltage-controlled oscillator, so that its frequency is gradually adjusted to synchronize with the input reference signal and enter the "locked" state. If the frequency and phase of the input reference signal change, the PLL controls the frequency and phase of the voltage-controlled oscillator to track the changes of the input reference signal and re-enter the locked state.

  • 4. How does PLL increase frequency?

    PLL (phase-locked loop) is usually used to increase or decrease the frequency of a signal. Increasing the frequency usually involves increasing the value of the feedback divider, while decreasing the frequency involves increasing or adjusting the gain followed by a divider.

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