Xilinx Spartan-6 LX FPGA - Xilinx

Xilinx Spartan-6 LX FPGA - Xilinx
Xilinx Spartan-6 LX provides up to 147K logic cell density, 4.8Mb memory, integrated memory controller, DSP slices, and high-performance integrated IP supporting industry standards. Spartan-6 LX FPGAs are optimized for applications requiring the absolute lowest cost. The device offers extended densities ranging from 3,840 logic cells to 147,443 logic cells, consumes half the power of the previous Spartan family, and has more comprehensive and faster connections.
 The Xilinx Spartan-6 LX FPGA family provides high-efficiency, dual-register 6-input look-up table (LUT) logic with a large selection of built-in system-on-blocks based on proven 45nm low-power copper process technology for cost, power, and performance the best balance. Xilinx built-in system-on-modules include 18Kb block RAM, second-generation DSP48A1 slices, SDRAM memory controller, enhanced mixed-mode clock management block, Select technology, power-optimized high-speed serial transceiver blocks, PCI Express® compatible endpoint blocks, Advanced system-level power management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection.
In addition, these features provide a low-cost programmable alternative to custom ASIC products with unprecedented ease of use. Xilinx Spartan-6 LX FPGAs provide the best solution for high-volume logic designs, consumer-facing DSP designs, and cost-sensitive embedded applications.

1: Features Xilinx
Programmable System Integration
I/O connection pin count logic ratio high
Over 40 I/O Standards to Simplify System Design
PCI Express® (with integrated endpoint block)
Improved system performance
Up to 8 low-power 3.2Gb/s serial transceivers
800Mb/s DDR3 (with integrated memory controller)
Reduce BOM cost
Cost-optimized for system I/O expansion
MicroBlaze processor soft IP without external processor or MCU components
Reduced overall power consumption
1.2V core voltage and 1.0V core voltage optional
Zero power consumption with sleep power-down mode
Accelerated Design Productivity
Implemented with ISE® Design Suite—a free, front-to-back-end FPGA design solution for Linux and Windows
Complete designs quickly with integrated wizards
2; Apply Xilinx
 Industrial network
 Vehicle Networks and Connections
 High-resolution video and graphics